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| NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P3057LD TO-252 (DPAK) D PRODUCT SUMMARY V(BR)DSS 25 RDS(ON) 50m ID 12A 1. GATE 2. DRAIN 3. SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Energy Repetitive Avalanche Energy Power Dissipation 2 1 SYMBOL VGS LIMITS 20 12 8 45 60 3 48 20 -55 to 150 275 UNITS V TC = 25 C TC = 100 C L = 0.1mH L = 0.05mH TC = 25 C TC = 100 C ID IDM EAS EAR PD Tj, Tstg TL A mJ W Operating Junction & Storage Temperature Range Lead Temperature ( /16" from case for 10 sec.) THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient Case-to-Heatsink 1 2 1 C SYMBOL RJC RJA RCS TYPICAL MAXIMUM 3 75 UNITS C / W 1 Pulse width limited by maximum junction temperature. Duty cycle 1% ELECTRICAL CHARACTERISTICS (TC = 25 C, Unless Otherwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current1 V(BR)DSS VGS(th) IGSS IDSS ID(ON) VGS = 0V, ID = 250A VDS = VGS, ID = 250A VDS = 0V, VGS = 20V VDS = 20V, VGS = 0V VDS = 20V, VGS = 0V, TJ = 125 C VDS = 10V, VGS = 10V 12 25 0.8 1.2 2.5 V LIMITS UNIT MIN TYP MAX 250 nA 25 250 A A 1 APR-14-2003 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor VGS = 5V, ID = 12A VGS = 10V, ID = 12A VDS = 15V, ID = 12A DYNAMIC P3057LD TO-252 (DPAK) Drain-Source On-State Resistance1 Forward Transconductance1 RDS(ON) gfs 70 48 16 115 85 m S Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge 2 Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDS = 15V, RL = 1 ID 12A, VGS = 10V, RGS = 2.5 VDS = 0.5V(BR)DSS, VGS = 10V, ID = 6A VGS = 0V, VDS = 15V, f = 1MHz 450 200 60 15 2.0 7.0 6.0 6.0 20 5.0 nS nC pF Gate-Source Charge2 Gate-Drain Charge 2 2 Turn-On Delay Time2 Rise Time Turn-Off Delay Time2 Fall Time2 SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 C) Continuous Current Pulsed Current 3 IS ISM VSD trr IRM(REC) Qrr IF = IS, dlF/dt = 100A / S IF = IS, VGS = 0V 30 15 0.043 12 20 1.5 A V nS A C Forward Voltage1 Reverse Recovery Time Peak Reverse Recovery Current Reverse Recovery Charge 1 2 Pulse test : Pulse Width 300 sec, Duty Cycle 2%. Independent of operating temperature. 3 Pulse width limited by maximum junction temperature. REMARK: THE PRODUCT MARKED WITH "P3057LD", DATE CODE or LOT # 2 APR-14-2003 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P3057LD TO-252 (DPAK) 3 APR-14-2003 NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P3057LD TO-252 (DPAK) TO-252 (DPAK) MECHANICAL DATA mm Min. 9.35 2.20 0.48 0.89 0.45 0.03 5.20 Typ. Max. 10.10 2.40 0.85 1.50 0.60 0.23 6.20 mm Min. Typ. 0.80 6.40 5.00 0.55 0.60 4.40 6.60 5.50 1.10 1.00 4.60 Max. Dimension A B C D E F G Dimension H I J K L M N 4 APR-14-2003 |
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